IEEE Journal on Emerging and Selected Topics in Circuits and Systems

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12/03/2025

🚨 JETCAS Call for Papers - Don't Miss Your Opportunity!

📅 Manuscript submission deadline is approaching on: 08 December 2025

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) is seeking paper submissions for Advances in Analog and Mixed-Signal Computing: Architectures, Theory, and Applications.

Guest Editors:
✨Prof. Paul P. Sotiriadis, National Technical University of Athens, Greece
✨Prof. Gert Cauwenberghs, University of California San Diego
✨Prof. Yiran Chen, Duke University
✨Dr. Abu Sebastian, IBM Research

🔗 View the full call for papers here: https://loom.ly/giqVrVA
🔗 Prospective authors are invited to submit their papers following the instructions provided on the IEEE JETCAS website: https://loom.ly/CseLH7g

11/26/2025

🌟 About JETCAS 🌟

When you cite articles from the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), you’re referencing a publication recognized for its strong impact in the circuits and systems community.

📊 Bibliometrics

Impact Factor: 3.8

CiteScore: 9.6

Article Influence® Score: 1.411

Eigenfactor® Score: 0.00391

🔍 Why it matters:
Citing JETCAS papers strengthens your own work by connecting it to rigorously peer-reviewed research that spans both foundational knowledge and emerging areas in circuits and systems. With its respected metrics and specialized focus, JETCAS provides high-quality references that add credibility and visibility to your research.

11/20/2025

Want to stay ahead in the rapidly evolving world of emerging technologies in circuits and systems? 🚀🤖 Make sure you're following JETCAS on all of our social media accounts!

Whether you're a seasoned academic, a pioneering researcher, an innovative engineer, or simply curious about the next big thing in circuits, our channels are your go-to for the latest breakthroughs and essential insights in this exciting field.

Don't miss a beat! Stay connected:
🔹 Linkedin: https://loom.ly/l01xhVQ
🔹 Facebook: https://loom.ly/2YoNOe0

11/10/2025

What are the most common pitfalls in the IEEE article submission process? 📝

Avoid these mistakes to ensure a smooth submission:
🚫 Not following submission guidelines: This can lead to delays or even desk rejection.
🚫 Submitting to multiple journals at once: This is not permitted by IEEE.
🚫 Misuse of AI: Adherence to IEEE’s AI use guidelines is critical.

Learn more and master the submission process here: https://loom.ly/wJHjxo8

11/07/2025

📣 JETCAS Call for Papers!

📅 Manuscript submission deadline is: 08 December 2025

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) is seeking paper submissions for Advances in Analog and Mixed-Signal Computing: Architectures, Theory, and Applications.

Guest Editors:
✨Prof. Paul P. Sotiriadis, National Technical University of Athens, Greece
✨Prof. Gert Cauwenberghs, University of California San Diego
✨Prof. Yiran Chen, Duke University
✨Dr. Abu Sebastian, IBM Research

🔗 View the full call for papers here: https://loom.ly/giqVrVA
🔗 Prospective authors are invited to submit their papers following the instructions provided on the IEEE JETCAS website: https://loom.ly/CseLH7g

11/06/2025

📢 Call for Papers – IEEE JETCAS

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) invites submissions for Circuits and Systems for Extended Reality.

Topics include (but are not limited to):
🔹 Interaction technologies for XR
🔹 Energy-efficient architectures
🔹 Real-time processing & on-device learning
🔹 Multimodal integration
🔹 Application-driven XR hardware systems

📅 Submission Deadline: March 2, 2026

Details: https://loom.ly/Q4fEW4Y

11/05/2025

🚀 New Issue Alert – IEEE JETCAS (Vol. 15, Issue 3)

2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test — Part I

Discover breakthroughs in accelerator chiplet and NoC design, interconnect protocols, EDA co-optimization, innovative packaging, and DfT strategies ensuring performance and reliability in chiplet-based systems.

📖 Access the full issue: https://loom.ly/1FQdET4

🔗 Stay connected — be sure to sign up for alerts in IEEE Xplore for the upcoming Part II issue and other journal updates.

11/04/2025

📢 DEADLINE EXTENDED!!! Call for Special Issue Proposals – IEEE JETCAS

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) is inviting proposals for upcoming special issues (starting with the December 2026 issue and beyond).

We welcome interdisciplinary topics that address emerging challenges and opportunities in circuits and systems—bringing together thought leaders across academia and industry.

🔹 Assemble a team of 2–4 Guest Editors
🔹 Highlight innovative and impactful research themes
🔹 Extended deadline is 5 December 2025

👉 Access the full Call for Proposals here: https://loom.ly/TcRj02Q

11/04/2025

☀️📖🏆 For the final paper in our retrospective of best papers from 2024, it pleases us to showcase one of the OPEN ACCESS spotlight articles from Volume 14, Issue 4, December 2024, titled: "Auditing and Generating Synthetic Data with Controllable Trust Trade-offs." This paper was selected in our retrospective based on the guest editor feedback and popularity gained over this last year. It also won the 2024 JETCAS PAPER OF THE YEAR!

Authored by ✍️Brian Belgodere; Pierre Dognin; Adam Ivankay; Igor Melnyk; Youssef Mroueh; Aleksandra Mojsilović; Jiri Navratil; Apoorva Nitsure; Inkit Padhi; Mattia Rigotti; Jerret Ross; Yair Schiff; Radhika Vedpathak; Richard A. Young

Synthetic datasets help tackle critical challenges like biases, imbalances, and privacy risks in real-world data, but ensuring their trustworthiness remains a significant hurdle. To address this, we propose a comprehensive auditing framework that evaluates generative AI models and synthetic datasets across tabular, time-series, vision, and natural language data for bias prevention, fidelity, privacy preservation, and utility. Our auditing framework provides clear, transparent reports via communicating trustworthiness indices, that ensure trust and compliance in synthetic data generation.

☀️This is a SPOTLIGHT PAPER based on its reviews and potential.
📖 It is also OPEN ACCESS! Use the link below to access the paper from anywhere.
🏆 The paper won the JETCAS BEST PAPER OF THE YEAR!

Article is openly accessible on IEEE Xplore here👉 https://loom.ly/YHu9oQI

11/03/2025

🌞Once more, we're shining the spotlight on this archived paper from 2023, titled "Event-Triggered Distributed Consensus Tracking for Nonlinear Multi-Agent Systems: A Minimal Approximation Approach" published in the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS). The paper was selected in this retrospective based on the guest editor feedback and popularity gained over this last couple years.

📝 Volume 13, Issue 3, September 2023
✍️ Authored by: Ning Xu, Zhongyu Chen, Ben Niu, Xudong Zhao

For nonlinear MASs with limited resources, it is essential to formulate a event-triggered control scheme that can concurrently improve the efficiencies of calculation and communication. By virtue of the minimal approximation technology, the calculation cost of the event-triggering mechanism is significantly reduced, and the explosion of complexity does not need to be considered in the proposed backstepping design. A minimal-approximation-based event-triggered leader-following consensus control scheme is proposed for nonlinear multi-agent systems with unknown actuator dead-zone.

The authors commented that they are truly honored to have their paper published in JETCAS. The feedback received during the peer-review process was highly constructive and significantly enhanced the quality of the work.

Read the article on IEEE Xplore here: https://loom.ly/RAvHLfk

10/31/2025

Check out this high-quality article from the JETCAS archive: "A Highly-Scalable Deep-Learning Accelerator With a Cost-Effective Chip-to-Chip Adapter and a C2C-Communication-Aware Scheduler." This paper was selected in this retrospective based on guest editor feedback and popularity gained since its publication. Congratulations to the authors!!

✍️ Authored by: Jicheon Kim; Chunmyung Park; Eunjae Hyun; Xuan Truong Nguyen; Hyuk-Jae Lee
📝 Volume: 14, Issue: 3, September 2024

The scaling of deep neural networks presents a growing challenge, as multi-chip-module (MCM) technology, while cost-effective, faces significant limitations due to chip-to-chip communication overhead, particularly in terms of bandwidth constraints and synchronization latency.

This work introduces a highly scalable deep learning accelerator, incorporating ❶ a ring-based chip-to-chip communication network, ❷ reuse of conventional CNN accelerator design, and ❸ a low-cost chip-to-chip adapter, along with a C2C-communication-aware scheduler, designed to effectively mitigate the impact of chip-to-chip communication overhead.

Experimental results demonstrate an average 3.43× improvement in throughput for a four-chip configuration, with notable performance gains observed on various CNN workloads such as ResNet50, DarkNet19, MobileNetV1, and EfficientNetS, even under constrained C2C bandwidth.

🔗 Read more on IEEE Xplore here: https://loom.ly/K9zfQiM

10/30/2025

🏆 We encourage you to explore this OPEN ACCESS paper from the JETCAS archives, "An Ultra-Low Cost and Multicast-Enabled Asynchronous NoC for Neuromorphic Edge Computing." This one had already earned the status of SPOTLIGHT PAPER in the September 2024 issue. Since then, it gained significant popularity and hence we highlight it again in this retrospective. Congratulations to the authors!

✍️ Authored by: Zhe Su; Simone Ramini; Demetra Coffen Marcolin; Alessandro Veronesi; Milos Krstic; Giacomo Indiveri; Davide Bertozzi; Steven M. Nowick
📝 Volume: 14, Issue: 3, September 2024

Motivated by the need for more efficient computing, biological brains are inspiring the development of spiking neural-network-based neuromorphic processors for energy-constrained edge devices. This work addresses a critical bottleneck in neuromorphic systems: the communication architecture, proposing a specialized network-on-chip (NoC) design optimized for event-driven, short-message routing. The result is a NoC that achieves energy savings of 42% to 71% compared to a state-of-the-art NoC in real multi-core neuromorphic processors.

🔗 Read more on IEEE Xplore here: https://loom.ly/ut5fr1s
📖 Remember! It is open access.
🏆 Also, it was selected as a spotlight paper by the editors based on the reviews, quality, and potential impact of the work; and now in this retrospective thanks to the popularity earned during the last year.

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